Title of article
A false-lock-free clock/data recovery PLL for NRZ data using adaptive phase frequency detector
Author/Authors
G.، Idei, نويسنده , , H.، Kunieda, نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2003
Pages
-895
From page
896
To page
0
Abstract
An adaptive four-state phase-frequency detector (PFD) for clock and data recovery (CDR) phased-lock loop (PLL) of nonreturn to zero (NRZ) data is presented. The PLL achieves false-lock free operation with rapid frequency capture and wide capture range. The false-lock-free nature of the PLL is achieved by adaptively adjusting data delay in the proposed PFD. Circuitry and corresponding operation of blocks in the PFD and overall PLL architecture that enables rapid frequency capture and prevents false lock are described in detail.
Keywords
Food patterns , Prospective study , waist circumference , Abdominal obesity
Journal title
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II:ANALOG AND DIGITAL SIGNAL PROCESSING
Serial Year
2003
Journal title
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II:ANALOG AND DIGITAL SIGNAL PROCESSING
Record number
100083
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