A 0.4V, 790µW CMOS Low Noise Amplifier in Sub-Threshold Region at 1.5GHz

A fully integrated low-noise amplifier (LNA) with 0.4V supply voltage and ultra low power consumption at 1.5GHz by folded cascode structure is presented. The proposed LNA is designed in a TSMC 0.18 µm CMOS technology, in which all transistors are biased in sub-threshold region. Through the use of proposed circuit for gain enhancement in this structure and using forward body bias technique, a very high figure of merit is achieved, in comparison to the similar structures. The LNA provides a power gain of 14.7dB with a noise figure of 2.9dB while consuming only 790µW dc power. Also, impedance matching of input and output of the circuit in its operating frequency is desirable and in the whole bandwidth of the circuit, input and output isolation is below -33dB.