Analysis and implementation of a single-phase capacitor-clamped inverter with simple structure

A novel single-phase inverter with the capacitor-clamped topology is presented to generate a sinusoidal voltage to a critical load. There are two legs in the proposed inverter. One inverter leg consists of four active switches and one flying capacitor. This inverter leg operates at a high switching frequency to generate three voltage levels on the AC terminal. The other inverter leg consists of four active switches without a flying capacitor. This inverter leg operates at a low switching frequency to generate two voltage levels on the AC terminal. Therefore, five voltage levels are generated on the AC terminal of the proposed inverter. The control scheme of the proposed inverter is easy to implement compared with the conventional capacitor clamped inverter. The control goals of the proposed inverter are to generate a sinusoidal output voltage to the critical load and to generate a multilevel PWM voltage waveform on the AC side to reduce the voltage harmonics. The system model and control algorithm are described and analysed. Experimental results are presented to verify the effectiveness of the proposed control scheme.