Author/Authors :
T.، Hirakawa, نويسنده , , H.J.، Mattausch, نويسنده , , T.، Koide, نويسنده , , T.، Hironaka, نويسنده , , K.، Johguchi, نويسنده , , Z.، Zhu, نويسنده ,
Abstract :
A proposal to improve the low access bandwidth of conventional one-port caches by utilising a multi-bank structure with distributed crossbar to increase port number at small additional area cost is presented. This enables combination of data and instruction caches into a single multi-port cache as well as different wordlength for each port. Through dynamically scheduling the storage space used for data and instructions, 25% smaller storage capacity is sufficient for a given maximum cache-miss probability.