Title of article
Asynchronous rate divider and multiplier designs for LEDR logic
Author/Authors
R.B.، Reese, نويسنده , , C.، Traver, نويسنده , , J.C.، Harden, نويسنده , , K.، Goodjohn, نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2004
Pages
-413
From page
414
To page
0
Abstract
Designs for asynchronous circuit modules that allow communication using level encoded dual-rail (LEDR) signalling between two circuits that operate at different computation rates are presented. Signal transition graphs and asynchronous flow tables are used to design these circuits to the gate and transistor level and they are simulated to validate functionality.
Keywords
Hydrograph
Journal title
IEE Electronics Letters
Serial Year
2004
Journal title
IEE Electronics Letters
Record number
107219
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