Author/Authors :
M.، Chrzanowska-Jeske, نويسنده , , X.، Song, نويسنده , , M.، Dharmadhikari, نويسنده , , O.A.، Mohamed, نويسنده ,
Abstract :
A simple and fast algorithm for solving the two-terminal board level routing problem in FPGA-based logic emulation systems is presented. The method is based on the net scan selection process. Experimental results are the first implemented results for an algorithm presented previously. The comparison results show that the current approach achieves better effectiveness and uses less CPU time.
