Author/Authors :
J.، Kim, نويسنده , , B.، Lee, نويسنده , , S.-G.، Kim, نويسنده , , T.M.، Roh, نويسنده ,
Abstract :
A novel process technique for fabricating trench gate DMOSFETs using the two-step trench technique and trench contact structure is realised to obtain higher cell density and lower on-resistance. Using this process technique, a remarkably increased trench gate DMOSFET with a cell pitch of 1.6 (mu)m and a channel density of 130 Mcell/in/sup 2/ are obtained. The fabricated device has a low specific on-resistance of 0.28 m(omega) . cm/sup 2/ with a blocking voltage of 43 V, which is about 23 % lower than that of the device fabricated by the previous method.