Title of article
Low-power and high-performance equality comparator using pseudo-NMOS NAND gates
Author/Authors
C.-Y.، Kim, نويسنده , , L.-S.، Kim, نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2004
Pages
-10
From page
11
To page
0
Abstract
An equality comparator (EC), which exploits the fact that unequal cases happen more frequently in compare operations, is proposed. It is composed of conditional pseudo-NMOS NAND gates to save the power of the unused sub-ECs. The proposed 64-bit EC results in 31% faster speed and 42% less power dissipation than the conventional dynamic EC.
Keywords
Hydrograph
Journal title
IEE Electronics Letters
Serial Year
2004
Journal title
IEE Electronics Letters
Record number
107668
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