Low-power and high-performance equality comparator using pseudo-NMOS NAND gates

An equality comparator (EC), which exploits the fact that unequal cases happen more frequently in compare operations, is proposed. It is composed of conditional pseudo-NMOS NAND gates to save the power of the unused sub-ECs. The proposed 64-bit EC results in 31% faster speed and 42% less power dissipation than the conventional dynamic EC.