Author/Authors :
Serin Park، نويسنده , , Sohee Park، نويسنده , , Hye Mi So، نويسنده , , Eun-Kyoung Jeon، نويسنده , , Dong-Won Park، نويسنده , , Ju-Jin Kim، نويسنده , , Beom Soo Kim، نويسنده , , Ki-jeong Kong، نويسنده , , Hyunju Chang، نويسنده , , Jeong-O. Lee، نويسنده ,
Abstract :
We have employed computer-aided furnace design and process simulation to optimize the conditions under which single-walled carbon nanotubes (SWCNTs) may be grown in high yields on 4 in. wafers for electronic device applications. Hydrokinetic simulations were performed to obtain optimized furnace structures and process conditions in terms of gas flow, temperature, and gas speed. Shower head structures and a flow isolation barrier were installed in an experimental 6 in. furnace, as suggested by the hydrokinetic simulations. To ensure clean surfaces and uniform catalyst islands, catalyst patterns were lifted off using Au films or polydimethylsiloxane. Photolithography was used to fabricate field-effect transistors with SWCNTs grown on 4 in. wafer substrates. The total yield of the nanotube devices increased from 30.5% to 96.4% after optimization.