Multithreaded shared memory parallel implementation of the electronic structure code GAMESS Original Research Article

The parallelization of electronic structure theory codes has become a very active area of research over the last decade. Until recently, however, most of this research has dealt with distributed memory parallel architectures. The objective of this work is to provide general information about the parallel implementation of the General Atomic Molecular Electronic Structure System, GAMESS, for the TERA multithreaded shared memory architecture. We describe the programming paradigm of this machine, the strategies used to parallelize GAMESS, general performance results obtained to date, conclusions and future work on this project.