High-level co-simulation based on the extension of processor simulators

Hardware¯software co-design is the cornerstone in the design of complex systems that involve both hardware and software. This paper presents a co-design approach where the co-simulation between hardware and software takes place early enough in the design cycle. The proposed platform is based on the extension of existing instruction set processor simulators in order to encapsulate hardware block description in the required and adequate accuracy level. The simplicity of the proposed technique as well as the use of homogeneous simulation environment, leads to a co-simulation alternative that is easy to implement and use. The applicability of the co-simulation environment developed is exhibited through the design and co-simulation, at various abstraction layers, of a telecommunication application. The latter, is based on the MAC layer and the RF-IF part of the Physical layer of the DECT protocol stack.