Theory and application of non-group cellular automata for message authentication

An ASIC based on cellular automata (CA) for data-authentication has been proposed in this paper. The scheme is designed from the analytical study of the state transition behaviour of non-group CA, and is significantly different from conventional approaches. Experimental studies confirm the superiority in terms of CPU time (50% reduction) of the software implementation of the proposed scheme compared to standard MD-5 algorithm, the most commonly used method. Regular, modular and cascadable structure of CA with local interconnections makes the scheme ideally suitable for VLSI implementation. The CA based hardware can achieve further speed improvement approximately by at least three order, depending on the message length. The proposed scheme supports existing IPv4 data rates on high bandwidth links (800 Mbps HiPPI). A register in the datapath of a processor can be easily converted to a CA to realize the hardware. The design has been specified in Verilog, simulated for functional correctness, and synthesized using the tool Synergy from Cadence.