POPS: A tool for delay/power performance optimization

Based on an incremental path search algorithm, this paper addresses the problem of performance-driven path classification by sizing selected gates on the shortest and the longest identified paths of the circuit. Delay and power/area constraints are managed using circuit path sizing alternatives defined through a realistic evaluation of gate power and delay. Implemented in the performance optimization by path selection (POPS) tool, the accuracy of this technique is compared to evaluation obtained from industrial tools [23] on examples of path enumeration and optimization evaluated on several ISCASʹ85 benchmarks.