Title of article :
Strategy for power efficient combined task and data parallelism exploration illustrated on a QSDPCM video codec
Author/Authors :
Danckaert، Koen نويسنده , , Masselos، Kostas نويسنده , , Catthoor، Francky نويسنده , , Man، Hugo De نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 1999
Abstract :
This paper considers the past, present and future of architectures for high performance image processing:. After reviewing a number of representative designs of image processing-specific architectures, four current approaches arc considered in more detail: standard microprocessor technology. DSP processors, parallel processing and dynamically reprogrammable hardware in the form of Field Programmable Gate Arrays (FPGAs). A final section considers which approaches are more likely to be successful in the future. © 1999 Published by Elsevier Science B. V. All rights reserved.
Keywords :
Memory optimization , Low-power design , Hybrid task-data parallelism , Processor partitioning , Multi-media
Journal title :
Journal of Systems Architecture
Journal title :
Journal of Systems Architecture