An improved procedure for bump plating of planar diodes

This paper presents an improved procedure for electroplating metal bumps on an array of planar P+–N zener, varactor or rectifier diodes fabricated on a common N-type substrate. The improvements pertain to avoidance of undesirable plating on the substrate periphery and stabilization of the plating current against unpredictable changes in the plating load resistance, when the N-type region is used as the cathode. The former improvement is achieved using a periodic reverse voltage for electroplating, and the latter using a special circuit for automatically adjusting the plating voltage amplitude to compensate for the plating resistance variations.