The overview of Low-Voltage Low-Power Design Techniques and the Design of a Low-Voltage Low-Power Low-Noise Operational Amplifier

In this paper an overview of circuit techniques dedicated to design low-power low-voltage is presented. These techniques including(a) dynamic threshold voltage MOSFET (DTMOS) (b) bulk-driven and (c) current-driven bulk (CDB)are applied to design low-power low-voltage and low-noise CMOS operational amplifier (op amp) using sub-threshold region of MOSFET for bio-medical instrumentation operating with a 0.6 V supply. The operational amplifier is designed and simulated using TSMC 0.18?m CMOS technology. With DTMOS technique, the open loop gain is 60.51 dB, the unity gain-bandwidth (UGBW) is 12.08 kHz, phase margin is 52.3 degree and power consumption is 53.21 nW. With bulk-driven technique, the open loop gain is 49.04 dB, the unity gain-bandwidth is 3.32 kHz, the phase margin is 71.96 degree and thepower consumption is 53.3 nW. With CDB technique, the open loop gain is 53.54 dB, the unity gain-bandwidth is 19 kHz, thephase margin is 50 degree and the power consumption is 55.79 nW. The DTMOS technique provides high open loop gain, the CDB technique provides high unity gain-bandwidth andthebulk-driven technique provides better phase margin. Also DTMOS technique has less input-referred noise than the other methods.