Performance improvements of crystalline silicon by iterative gettering process for short duration and with the use of porous silicon as sacrificial layer

In this work, we demonstrate that an efficient purification method of silicon wafers where iterative sequences were used. Each sequence consists of forming porous silicon (PS) on both sides of the samples, followed by thermal annealing in an infrared furnace under N2/SiCl4 ambient. Improvements of the electronic parameters were obtained by optimizing the heat treatments temperatures and the number and duration of the iteration sequences. Best results were obtained for temperatures below 980 °C and for three sequences of 20 min each one. After three sequences the mobility of the majority carrier improved from 94 cm2 V−1 s−1 (for untreated wafer) to about 374 cm2 V−1 s−1. The observed results were explained taking into account the transport properties of the impurities in the porous media and their concentration at the walls at each iteration. It was found that short iterative sequences give almost the same results than one long sequence duration. Silicon solar cells based on iterative gettered silicon wafers exhibit an increase in the short-circuit current and the open-circuit voltage. This fact seems to be important to ameliorate solar grade silicon (SGS) based solar cells performances.