Robust design for disturbance rejection in time delay systems

A frequency domain methodology for the design of practical, low order controllers for processes involving relatively large dead time is presented. The methodology consists of determining the optimum structure and parameters of the controller so that the closed loop disturbance response matches the response of a pre-specified reference model. This approach allows the designer to directly incorporate acceptable disturbance rejection characteristics for the closed loop system in the early stages of design. st important task in the methodology is the selection of an appropriate reference model. It is shown that the reference model must meet certain mathematical conditions to guarantee physical realizability of the controller and the internal stability of the system. rence specification procedure is developed to provide a large margin of robustness for the design while assuring a fast decay of the disturbance response. The power of the methodology is demonstrated by several non-trivial design examples pertaining to stable, unstable and non-minimum-phase process models with significant dead time. The tradeoff between robustness and response speed is discussed and illustrated.