• Title of article

    Leveraging cost matrix structure for hardware implementation of stereo disparity computation using dynamic programming

  • Author/Authors

    MacLean، نويسنده , , W. James and Sabihuddin، نويسنده , , Siraj and Islam، نويسنده , , Jamin، نويسنده ,

  • Issue Information
    روزنامه با شماره پیاپی سال 2010
  • Pages
    13
  • From page
    1126
  • To page
    1138
  • Abstract
    Dynamic programming is a powerful method for solving energy minimisation problems in computer vision, for example stereo disparity computations. While it may be desirable to implement this algorithm in hardware to achieve frame-rate processing, a naı¨ve implementation may fail to meet timing requirements. In this paper, the structure of the cost matrix is examined to provide improved methods of hardware implementation. It is noted that by computing cost matrix entries along anti-diagonals instead of rows, the cost matrix entries can be computed in a pipelined architecture. Further, if only a subset of the cost matrix needs to be considered, for example by placing limits on the disparity range (include neglecting negative disparities by assuming rectified images), the resources required to compute the cost matrix in parallel can be reduced. Boundary conditions required to allow computing a subset of the cost matrix are detailed. Finally, a hardware solution of Cox’s maximum-likelihood, dynamic programming stereo disparity algorithm is implemented to demonstrate the performance achieved. The design provides high frame rate (>123 fps) estimates for a large disparity range (e.g. 128 pixels), for image sizes of 640 × 480 pixels, and can be simply extended to work well over 200 fps.
  • Keywords
    Field Programmable Gate Arrays , Stereo disparity , Dynamic programming , Pipeline processing , Hardware , real-time systems
  • Journal title
    Computer Vision and Image Understanding
  • Serial Year
    2010
  • Journal title
    Computer Vision and Image Understanding
  • Record number

    1696021