Surface etching induced by Ce silicide formation on Si(1 0 0)

We investigate the temperature-dependent surface etching process induced by Ce silicide on Si(1 0 0) using scanning tunneling microscopy and X-ray photoelectron spectroscopy. We found that step edges on the Si(1 0 0) surface are gradually roughened due to the formation of Ce silicide as a function of substrate temperature. Unlike the Si(1 1 1) surface, however, terrace etching also occurs in addition to step roughening at 500 °C. Moreover, we found that Si(1 0 0) dimers are released and formed dimer vacancy lines because bulk diffusion of Ce silicide into Si(1 0 0) surface occurs the defect-induced strain at higher temperature (∼600 °C).