Heat dissipation analysis and design of a board-level phased-array transmitter module for 60-GHz communication

The study aims at investigating the heat dissipation capability of a board-level phased-array transmitter module in 65-nm CMOS technology with 4-element and 16-element antenna arrays for 60-GHz communication in a steady state under natural convection, and furthermore, performing thermal enhancement design. Both cavity-up and cavity-down flip chip packaging configurations are developed for the system-in-package module, and their thermal performance is examined and compared. To assess the thermal performance, both a three-dimensional (3D) heat conduction finite element model and a 3D computational fluid dynamics (CFD) model are implemented. The validity of the proposed numerical models is demonstrated by comparing the calculated results with each other, and also with the IR thermography measurement data based on JEDEC specifications. Besides, the uncertainty in the input supplied power from the specific power supply is examined, and its impact on the measured chip junction temperature is also assessed. Furthermore, enhancement of the thermal performance of the 16-elelemt transmitter module is sought through application of thermal modules and parametric CFD study. The crucial parameters most affecting the thermal performance of the module are identified, and further applied in the subsequent experimental design using a Taguchi method to pursue the optimal parametric setting for maximal thermal performance.