Title of article :
Area Efficient Single Phase Clock Divider
Author/Authors :
Sundhari، R. P. Meenaakshi نويسنده Sasurie College of Engineering , , Nandhakumar، R. نويسنده Sasurie College of Engineering , , Jagadeeshwaran، C. نويسنده Sasurie College of Engineering ,
Issue Information :
روزنامه با شماره پیاپی 1 سال 2013
Pages :
5
From page :
298
To page :
302
Abstract :
In this paper the prescaler circuit which is used by frequency synthesizers of Bluetooth, zigbee and WLAN is proposed with multi modulus 32/33/47/48 prescaler, ultra low power 2/3 prescaler and integrated P-counter and S-counter. This proposed prescaler can divide the frequency in three bands 0f 2.4-2.484GHz, 5.15-5.35GHz and 5.725-5.825GHz with a resolution selectable from 1-25MHz.The Area and power consumed by the 2/3 prescaler circuit is minimized.
Journal title :
International Journal of Electronics Communication and Computer Engineering
Serial Year :
2013
Journal title :
International Journal of Electronics Communication and Computer Engineering
Record number :
1993214
Link To Document :
بازگشت