Author/Authors :
A.، Saravanan V. نويسنده Angel College of Engineering and Technology, Tirupur , , TH، Akshaya نويسنده Angel College of Engineering and Technology, Tirupur , , B.، Kala نويسنده Angel College of Engineering and Technology, Tirupur , , B.، Sukirtharaj نويسنده Angel College of Engineering and Technology, Tirupur ,
Abstract :
A CMOS based low power 4-bit Flash Analog to
Digital Converter (ADC) design with reduced number of
comparators than the conventional Flash Analog to Digital
Converter and multiplexer based architecture is proposed.
For improving the conversion rate, both the analog and
digital parts of the ADC are fully modified and the
architecture uses only 4 comparators instead of 15 as used in
conventional flash ADC, thus saving considerable amount of
power. The proposed 4-bit ADC is designed and simulated in
TANNER tools with 1.2 V supply voltage using TSpice
simulation. The proposed design consumes low power of
2.15mW and operates at a faster rate hence it is suitable for
ECG applications
