Author/Authors :
M. and Gallin-Martel، نويسنده , , Laurent and Pouxe، نويسنده , , Joseph and Rossetto، نويسنده , , Olivier and Stassi، نويسنده , , Patrick، نويسنده ,
Abstract :
A compact Data Read Out System has been developed for PMT-Based Rich to perform the charge conversion, pixel encoding and data formatting for a large number of channels. This system is principally built around three circuits: A full custom VLSI circuit (ASIC) for charge conversion, a Field Programmable Gate Array (FPGA) for pixel encoding, thresholds and 12-bit ADC control, and a fast Digital Signal Processor (DSP) for data formatting.
