Author/Authors :
Bana?، نويسنده , , E. and Bozek، نويسنده , , A. and Ja?locha، نويسنده , , P. and Kapusta، نويسنده , , P. and Natkaniec، نويسنده , , Z. and Ostrowicz، نويسنده , , W. and Pa?lka، نويسنده , , H. and R??a?ska، نويسنده , , M. S. Marlow، نويسنده , , D. and Tanaka، نويسنده , , M.، نويسنده ,
Abstract :
We describe a four-channel, digital-signal-processor-based readout board, equipped with analog-to-digital converters. A series of identical boards work in parallel in the Belle experiment at KEK, performing a zero-suppressing readout of the silicon vertex detector. A cluster-searching algorithm executes quickly enough to allow low deadtime readout at a 500 Hz trigger rate. DSP code downloaded to the boards can be easily modified, affording a high degree of flexibility. We describe the board hardware, the algorithms employed in the experiment, and the software used to implement them.
