Author/Authors :
Karpukhin، نويسنده , , V. and Kulikov، نويسنده , , A. and Olshevsky، نويسنده , , V. and Trusov، نويسنده , , S.، نويسنده ,
Abstract :
Readout logic and architecture of the readout hardware of the DIRAC experiment at CERN are described. The data collection system is configured from dedicated and commercial readout branches running in a parallel hardware-controlled mode. The readout process is controlled by the trigger processors which may decide to reject an event during its acquisition. The system design provides a small dead time resulting in a sufficiently high rate capability.
