Title of article :
Using FPGA coprocessor for ATLAS level 2 trigger application
Author/Authors :
Khomich، نويسنده , , Andrei and Hinkelbein، نويسنده , , Christian and Kugel، نويسنده , , Andreas and Mنnner، نويسنده , , Reinhard and Müller، نويسنده , , Matthias، نويسنده ,
Pages :
5
From page :
80
To page :
84
Abstract :
Tracking has a central role in the event selection for the High-Level Triggers of ATLAS. It is particularly important to have fast tracking algorithms in the trigger system. This paper investigates the feasibility of using FPGA coprocessor for speeding up of the TRT LUT algorithm—one of the tracking algorithms for second level trigger for ATLAS experiment (CERN). Two realisations of the same algorithm have been compared: one in C ++ and a hybrid C ++ / VHDL implementation. Using a FPGA coprocessor gives an increase of speed by a factor of two compared to a CPU-only implementation.
Keywords :
Coprocessor , High-energy physics , LHC , ATLAS , trigger , Tracking , FPGA
Journal title :
Astroparticle Physics
Record number :
2029490
Link To Document :
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