Modeling of current–voltage and capacitance–voltage characteristics of pentacene and sol–gel derived SiO2 gate dielectric layer based on thin-film transistor

We report the synthesis and the characterization of organic thin film transistor based on pentacene presenting SiO2 dielectric layer deposed by sol–gel method. The texture of the obtained layers was analyzed by atomic force microscopy technique. The results show that all electric parameters in static and dynamic regimes depend on the morphology of the different layers. The transport phenomena of charges in channel transport of organic-TFT, was studied using the variable range hopping model. The capacitance characteristics of pentacene-TFT for various frequencies, and a simple small-signal equivalent circuit for pentacene thin film transistor were also investigated.