Static and dynamic behaviour of power devices in silicon-direct-bonded substrates

Burying SiO2 layers into silicon substrates by silicon direct bonding is one of the most promising substrate technologies for increasing the high-temperature capability of smart power devices for high-temperature applications. Leakage currents are suppressed and minority charge carriers are kept away from critical components. Temperature effects on semiconductor device parameters caused by the high ambient temperature and the dissipated power have to be considered in the circuit design phase. Measurement results show the effects of the reduced thermal conductivity and of the very small thermal capacitance of the active device region. In addition, the results of a simplified analytical calculation method will be presented in this paper.