Grain boundary crack growth in interconnects with an electric current

Failure of thin-film interconnects poses a great concern in semiconductor devices. Due to the high electric current density in interconnects, electromigration-induced atomic flux is recognized as an important failure mechanism. For wide polycrystalline interconnects, atomic flux along grain boundaries is believed to be the major failure mechanism. In situ transmission electron microscopy observations revealed void propagation along grain boundaries. Thus, we consider steady state crack growth along a grain boundary in an interconnect subjected to a high current density. Crack growth occurs via mass transport driven by surface curvature and electric field. For crack propagation transverse to the remote electric field, the direction of electric field on one crack surface is opposite to that on the other crack surface. The governing equation is derived and a numerical solution presented. The results indicated that crack growth rate and width are proportional to E03/2 and E0−1/2, respectively, where E0 is the applied electric field. The crack tip morphology map can be divided into four regions for all materials with a known ratio of boundary to surface free energies: Case I is defined as that both crack tip angles are positive, Case II, one of crack angles is 0°, and Case III, one crack tip angle is positive and the other is negative, Case IV corresponds to that crack growth is physically impossible to occur.