Low-temperature selective epitaxy of silicon with chlorinated chemistry by RTCVD

Low-temperature epitaxial depositions are greatly attractive in the way of device fabrication, in order to improve electrical performances of advanced complementary metal oxide semiconductor (CMOS) and BiCMOS technologies. They present, however, some important difficulties such as a very high sensitivity to temperature and complex loading effects. In this paper, we investigate the selective epitaxy of silicon based on the dichlorosilane (DCS)/HCl/H2 chemistry using an industrial 200-mm single wafer chemical vapour deposition at reduced pressure (<40 Torr) and low temperature (700–900 °C). First, we use a new evaluation procedure of the selectivity of Si epitaxy processes on thin nitride and oxide blanket coverage wafers with very low nuclei density counted with a surfscan. We evaluate the effects of intrinsic parameters of deposition such as HCl partial pressure and a parameter rarely reported in the literature: the duration of processes. Then we present results about global loading effects of Si growth within the DCS/H2 system and of Si etch within the HCl/H2 system. This allows us to anticipate and to give a new interpretation of the DCS/HCl/H2 system loading effects. Special attention has been taken in order to eliminate the thermal contribution of different substrates and only chemical loading effects are reported. These studies are relevant to the fabrication of elevated source and drain, which have been integrated in an industrial CMOS technology.