Field-effect transistor based on nanometric thin CdS films

Cadmium sulphide (CdS) thin films were deposited by chemical bath deposition (CBD) method on SiO2/Si (n-type) substrates. Approximately, 70 nm thick nano-crystalline CdS layers were obtained. Thin film field effect transistors were realised by deposition of two coplanar electrodes of Au (drain and source) on the CdS surface. The gate contact is aluminium deposited on the backside of the Si substrate. The drain current–drain voltage characteristics (Id−Vd) were performed in dark. Normal field effect transistor characteristics are obtained in case of positive gate and drain voltages, the device acting as an n-channel transistor in the accumulation mode. For negative drain voltages the characteristic is dominated by space charge limited currents (SCLC). An on/off current ratio of about 102 is reported, this being limited in our case by geometry.