High-speed readout for the H8500 flat panel PSPMT

In this paper we present a new readout system for the H8500 flat panel photomultiplier. The system is based on the MAX1320 analog-to-digital converter and reads all of 64 anodic signals simultaneously at a rate that approaches the 250 ksample/s typical of MAX1320 with a resolution of 14 bits. The data are read through an FPGA by a chip computer, the ETRAX 100LX, and either transmitted via Ethernet or stored on a USB mass storage device.