Title of article :
Design and Fabrication of a 9–11 GHz Balanced Low Noise Amplifier Using HJFET
Author/Authors :
Zeinadini، Z نويسنده Dept. of Electrical and Computer Engineering, Isfahan University of Technology (IUT), Isfahan, Iran , , Firouzeh ، Z. H. نويسنده Department of Electrical and Computer Engineering Isfahan University of Technology, Isfahan, Iran , , Bahadori-Nezhad، R. نويسنده Avionics Research Institute, Isfahan University of Technology (IUT), Isfahan, Iran ,
Issue Information :
فصلنامه با شماره پیاپی 7 سال 2014
Pages :
18
From page :
123
To page :
140
Abstract :
This paper describes the design of an X-band balanced low noise amplifier (LNA) using an available HJFET device. The balanced LNA consists of a pair of electrically similar transistors whose input and output signals are divided or combined by 3 dB two-stage Wilkinson power dividers. The proposed balanced LNA is fabricated and measured. The measured results show that the noise figure is 1.30 dB at 10 GHz, the input and output return loss are more than 15 dB and 10 dB, respectively. Also, the gain of 12 dB and gain flatness of ±0.5 dB over the 9-11 GHz frequency range are associated to the balanced LNA. In addition, 15-element small signal equivalent model parameters of the HJFET device used in amplifier design are extracted with an analytical and optimization approache such as Particle Swarm Optimization (PSO) to achieve accurate values. The small-signal model parameters evaluated with the PSO attain 5.9% error compared to the measured data. The validity of the proposed approach is shown by comparing the modeled S-parameter and measured results over 2-18GHz. Simulation results indicate that the PSO approach accurately extracts the small signal model parameters of the HJFET.
Journal title :
Journal of Communication Engineering
Serial Year :
2014
Journal title :
Journal of Communication Engineering
Record number :
2338379
Link To Document :
بازگشت