Optimized Design of Multiplexor by Quantum-dot Cellular Automata

Quantum-dot Cellular Automata (QCA) has low power consumption and high density and regularity. QCA widely supports the new devices designed for nanotechnology. Application of QCA technology as an alternative method for CMOS technology on nano-scale shows a promising future. This paper presents successful designing, layout and analysis of Multiplexer with a new structure in QCA technique. In this paper we generalize a 2 to 1 multiplexer, which is used as module to implement the 2n to 1 multiplexer. In this paper, we will present successful simulation of the 2 to 1, 4 to 1 and 8 to 1 multiplexer with QCA Designer. We will design a new multiplexer based on the majority gate with the minimum number of cells and consumed area. Being potentially pipeline, the QCA technology calculates with the maximum operating speed. We may use these multiplexers in the FPGA and ALU.