Author/Authors :
Bansal, Urvashi Division of Electronics and Communication Engineering - Netaji Subhas Institute of Technology, New Delhi, India , Gupta, Maneesha Division of Electronics and Communication Engineering - Netaji Subhas Institute of Technology, New Delhi, India , Kumar Rai, Shireesh Division of Electronics and Communication Engineering - Netaji Subhas Institute of Technology, New Delhi, India
Abstract :
Design of a very compact two stage amplifier is proposed by merging passive frequency compensation with a feed forward compensation technique, which achieves significant improvement in gain-bandwidth product (GBW), slew rate and phase margin with lower supply voltage requirement. The mathematical analysis given in this paper justify that the proposed technique offers the advantage of locating poles and zeros at higher frequencies than with the conventional method . The workability of the proposed amplifier has been verified by using Mentor Graphics Eldo simulation tool with TSMC CMOS 0.18 μm process parameters. The simulated results show a GBW of 150 MHz and average slew rate of 98 V/μs with a power consumption of 3.2 mW.
Keywords :
Analog Signal Processing , CMOS , Multistage Amplifier , Passive Compensation , Feed - forward Network
