Title of article :
Look up Table Based Low Power Analog Circuit Testing
Author/Authors :
Maharana, L. Department of Electronics and Communication Engineering - National Institute of Technology Agartala, Tripura, India , Sarkar, T. Department of Electronics and Communication Engineering - National Institute of Technology Agartala, Tripura, India , Nath Pradhan, S. Department of Electronics and Communication Engineering - National Institute of Technology Agartala, Tripura, India
Pages :
10
From page :
1247
To page :
1256
Abstract :
In this paper, a method of low power analog testing is proposed. In spite of having Oscillation Based Built in Self-Test methodology (OBIST), a look up table based (LUT) low power testing approach has been proposed to find out the faulty circuit and also to sort out the particular fault location in the circuit. In this paper an operational amplifier, which is the basic building block in the analog circuit, is designed and is taken for testing purpose. Fault coverage is identified after fault modeling, fault injection and fault simulation. More than 93% fault coverage is achieved and there is a scope of increasing more fault coverage. Since analog testing prefaces the challenge of power dissipation during testing, some power minimization techniques like sleepy stack method and current correlation method have adhered during the testing process. Test power reduction up to 84 % is achieved in this work.
Keywords :
Oscillation-based Built in Self-test (OBIST) , Look up Table (LUT) , Analog Testing , Operational Amplifier , Fault Coverage , Low Power , Low Power Current Correlator
Journal title :
Astroparticle Physics
Serial Year :
2016
Record number :
2444290
Link To Document :
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