Title of article :
Early wakeup: improving the drowsy cache performance
Author/Authors :
SHIM, Sunghoon Semiconductor Division - Computing Platform Team, Korea , CHUNG, Sungwoo Korea University - Division of Computer and Communication Engineering, Korea , CHOI, Hongjun Chonnam National University - School of Electronics and Computer Engineering, Korea , KIM, Cheol Hong Chonnam National University - School of Electronics and Computer Engineering, Korea
From page :
425
To page :
433
Abstract :
As process technology scales down, leakage power consumption becomes comparable to dynamic power consumption. The drowsy cache technique is known as one of the most popular techniques for reducing the leakage power consumption in the data cache. However, the drowsy cache is reported to degrade the processor performance significantly. In this paper, to maintain the performance of the processor with the drowsy cache technique, we propose an early wakeup technique, which predicts the next cache line to be requested by utilizing the way-prediction information. The proposed technique efficiently reduces the number of accesses to the cache lines in drowsy mode. Our simulation results show that the proposed technique reduces the extra delay due to the drowsy cache scheme by 29.6%, on average.
Keywords :
Processor architecture , low , power design , leakage power , drowsy cache , early wakeup
Journal title :
Turkish Journal of Electrical Engineering and Computer Sciences
Journal title :
Turkish Journal of Electrical Engineering and Computer Sciences
Record number :
2532635
Link To Document :
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