Author/Authors :
FAN, Siqiang Freescale Semiconductor, USA , TANG, He University of California - Department of Electrical Engineering, USA , ZHAO, Hui University of California - Department of Electrical Engineering, USA , WANG, Xin University of California - Department of Electrical Engineering, USA , WANG, Albert University of California - Department of Electrical Engineering, USA , ZHAO, Bin Freescale Semiconductor, USA , ZHANG, Gary G Skyworks Solutions, USA
Abstract :
This paper presents a new combined AC/DC-coupled output averaging technique for input amplifier design of flash analog-to-digital converters (ADC). The new offset averaging design technique takes full advantage of traditional DC-coupled resistance averaging and AC-coupled capacitance averaging techniques to minimize offset-induced ADC nonlinearities. Circuit analysis allows selection of optimum resistance and capacitance averaging factors to achieve maximum offset reduction in ADC designs. The new averaging method is verified in designing a 4 bit 1 Gs/s flash ADC that is implemented in foundry 0.13 μm CMOS technology.
Keywords :
analog , to , digital converter , flash analog , to , digital converters (ADC) , integrated circuit (IC) , offset averaging , resistor averaging , capacitor averaging
