Title of article :
Evict+Time Attack on Intel CPUs without Explicit Knowledge of Address Offsets
Author/Authors :
Meraji ، Vahid Cyberspace Research Institute - Shahid Beheshti University , Soleimany ، Hadi Cyberspace Research Institute - Shahid Beheshti University
Abstract :
Numerous studies have been conducted to present new attacks using the time difference between the processor access to main memory and cache memory. Accessdriven attacks are a series of cachebased attacks using fewer measurement samples to extract sensitive key values due to the ability of the attacker to evict or access cache lines compared to the other attacks based on this feature. In the accessdriven attacks, the attacker frequently needs to evict or reload data from the cache memory before or after performing the targeted cryptosystem which requires the knowledge about the virtual or physical addresses. Knowledge of address offset for the corresponding data blocks in cryptographic libraries is a prerequisite for an adversary to reload or evict cache lines in Intel processors. Preventing the access of attackers to the address offsets can potentially be a countermeasure to mitigate accessdriven attacks. In this paper, we demonstrate how to perform the Evict+Time attack on Intel x86 CPUs without any privilege of knowing address offsets.
Keywords :
access , driven attacks , LRU replacement policy , Inclusive memory
Journal title :
ISeCure - The ISC International Journal of Information Security
Journal title :
ISeCure - The ISC International Journal of Information Security