Multiprocessor Platform for Parallel Implementation of a Cost-Efficient H.264/AVC Encoder

The H.264/AVC (Advanced Video Codec) new video coding standard provides higher coding efficiency relative to former standards at the expense of higher computational requirements. Given the potential applications of this technology, we are developing an application environment able to decode an MPEG2 stream, convert it into an H.264/AVC stream, and stream it over a network. This paper focuses on the H.26/AVC video encoder implementation. Absolute complexity obtained results outline the potential of using a multiple processors platform for executing a parallel code version of the reference software. For this, a starting parallel Kahn process network (KPN) model is proposed, implemented and validated at high system-level. For cost-effective realization, we will motivate mapping the validated parallel model on a particular STMicroelectronics multiprocessor platform. For this purpose, a static code parser for the Very large Instruction Word (VLIW) selected processor has been developed to analyze, for each process of the model, the instruction level parallelism effectively used by the cross compiler and thus to get a clear picture about the best processes candidate for mapping on this processor.