Design and Realization of a Junction-less TFET for Analog and Digital Applications Based on Strain Engineering

This paper investigates the effects of the uniaxial tensile strain on the performance of an all silicon junction-less tunneling field-effect transistor (JLTFET) for analog and digital applications. The behavior of the JLTFET under global and local uniaxial strain are studied based on the energy band diagram at ON, OFF, and ambipolar states. Under local uniaxial tensile strain, it has been observed that the tunneling length at the channel/source interface in the ON state has been decreased and at the channel/drain interface in the OFF state has been increased. Simulations illustrate improvements in ON current, ION/IOFF and steep sub threshold swing (SS) and superior transconductance (gm). The strained JLTFET, also demonstrates capability for low-voltage application and high cut-off frequency (fT) and suppressed ambipolar current (Iamb).