Title of article
A Procedure to Compare CNTFET and CMOS Technologies through the Design of a SRAM Cell: A Review
Author/Authors
Marani ، Roberto Institute of Intelligent Industrial Technologies and Systems for Advanced Manufacturing (STIIMA) - National Research Council of Italy - Polytechnic University of Bari , Perri ، Anna Gina Electronic Devices Laboratory, Department of Electrical and Information Engineering - Polytechnic University of Bari
From page
113
To page
127
Abstract
In this paper we review in depth a procedure to compare the performance of CNTFET and MOSFET devices operating in sub-threshold region for ultra-low power applications. This aim is obtained through the design of a SRAM cell. The first design is based on our CNTFET model, while for the second one we use the BSIM4 model of the ADS library. At last the comparison between the two considered technologies are quantitatively presented, showing and discussing the improvements obtained with CNTFET technology. All simulations are carried out using the software Advanced Design System (ADS), which is compatible with the Verilog-A programming language, avoiding so the problems presented in SPICE used in previous designs proposed in literature.
Keywords
nanoelectronics , Nanodevices , CNTFET , CMOS , Modelling , SRAM cell , Verilog , A
Journal title
International Journal of Nanoscience and Nanotechnology (IJNN)
Journal title
International Journal of Nanoscience and Nanotechnology (IJNN)
Record number
2763236
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