Title of article :
A Novel Dual-Modulus 2.8 GHz Divide-by-127/128 Prescaler Using Pull Down Transistor in 0.35 μ m CMOS Technology
Author/Authors :
Ram Singh Rana ، نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2005
Keywords :
prescaler - CMOS - dual-modulus - filp-flop - PLL - counter
Journal title :
Analog Integrated Circuits and Signal Processing
Journal title :
Analog Integrated Circuits and Signal Processing
