• Title of article

    Optimal loop scheduling for hiding memory latency based on two-level partitioning and prefetching

  • Author/Authors

    Zhong Wang، نويسنده , , OʹNeil، نويسنده , , T.W.، نويسنده , , Sha، نويسنده , , E.H.-M.، نويسنده ,

  • Issue Information
    روزنامه با شماره پیاپی سال 2001
  • Pages
    12
  • From page
    2853
  • To page
    2864
  • Keywords
    Prefetching , Memory Hierarchy , Latency hiding , scheduling. , Partitioning
  • Journal title
    IEEE TRANSACTIONS ON SIGNAL PROCESSING
  • Serial Year
    2001
  • Journal title
    IEEE TRANSACTIONS ON SIGNAL PROCESSING
  • Record number

    388519

    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=10&DC=388519