Title of article :
Bit vector architecture for computational mathematical morphology
Author/Authors :
Handley، نويسنده , , J.C. ، نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2003
Pages :
6
From page :
153
To page :
158
Abstract :
A real-time, compact architecture is presented for translation-invariant windowed nonlinear discrete operators represented in computational mathematical morphology. The architecture enables output values to be computed in a fixed number of operations and thus can be pipelined. Memory requirements for an operator are proportional to its basis size. An operator is implemented by three steps: 1) each component of a vector observation is used as an index into a table of bit vectors; 2) all retrieved bit vectors are “ANDed” together; and 3) the position of the first nonzero bit is used as an index to a table of output values. Computational mathematical morphology is described, the new architecture is illustrated through examples, and formal proofs are given. A modification of the basic architecture provides for increasing operators.
Keywords :
image processing hardware , Electronic printing , nonlinear filters. , lattice operators , increasing operators
Journal title :
IEEE TRANSACTIONS ON IMAGE PROCESSING
Serial Year :
2003
Journal title :
IEEE TRANSACTIONS ON IMAGE PROCESSING
Record number :
396839
Link To Document :
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