Title of article :
Enhanced resolution for future fabrication
Author/Authors :
Fritze، نويسنده , , M.، نويسنده , , Chen، نويسنده , , C.K.، نويسنده , , Astolfi، نويسنده , , D.K.، نويسنده , , Yost، نويسنده , , D.R.، نويسنده , , Burns، نويسنده , , J.A.، نويسنده , , Chang-Lee Chen، نويسنده , , Gouker، نويسنده , , P.M.، نويسنده , , Suntharalingam، نويسنده , , V.، نويسنده , , Wyatt، نويسنده , , P.W.، نويسنده , , Keast، نويسنده , , C.L.، نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2003
Pages :
5
From page :
43
To page :
47
Abstract :
We have developed resolution-enhanced optical lithography processes that have enabled us to fabricate devices with deep sub-100 nm feature sizes. Isolated gate features were resolved down to 40 nm in resist using optimized phase-shift lithography processes. The addition of a small reactive ion etch (RIE) etch bias allowed us to fabricate transistors with gate lengths in the range 9-25 nm. This was achieved using standard 248 nm optical stepper, photoresist, and RIE technology. The capability is valuable for providing robust fabrication processes for advanced device technology studies. Double-exposure phase-shift imaging is also achieving growing industry acceptance with promising new results recently reported by UMC and Intel. These results show that optical lithography with aggressive resolution enhancements will likely be able to meet the needs of the semiconductor industry for the rest of this decade, pushing out the anticipated introduction of next-generation lithography (NGL) technologies further into the future.
Journal title :
IEEE Circuits and Devices Magazine
Serial Year :
2003
Journal title :
IEEE Circuits and Devices Magazine
Record number :
397526
Link To Document :
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