Title of article
System-on-a-Programmable-Chip Development Platforms in the Classroom
Author/Authors
T. S. Hall and J. O. Hamblen، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2004
Pages
6
From page
502
To page
507
Abstract
This paper describes the authors’ experiences using a
system-on-a-programmable-chip (SOPC) approach to support the development
of design projects for upper-level undergraduate students
in their electrical and computer engineering curriculum. Commercial
field-programmable gate-array (FPGA)-based SOPC development boards
with reduced instruction set computer (RISC) processor cores are used
to support a wide variety of student design projects. A top-down rapid
prototyping approach with commercial FPGA computer-aided design
tools, a C compiler targeted for the RISC soft-processor core, and a large
FPGA with memory is used and reused to support a wide variety of student
projects.
Keywords
Altera , Nios , processor core , microblaze , system on a chip (SOC) , system on aprogrammable chip (SOPC) , Xilinx. , field-programmable gate array (FPGA)
Journal title
IEEE TRANSACTIONS ON EDUCATION
Serial Year
2004
Journal title
IEEE TRANSACTIONS ON EDUCATION
Record number
398190
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