Author/Authors :
Li، نويسنده , , Y.، نويسنده , , Chou، نويسنده , , H.-M.، نويسنده ,
Keywords :
densitygradient drift-diffusion model , double-gate MOSFET , drain-inducedbarrier height lowering , Numerical simulation , quantum correction transport model , on/offcurrent ratio , sub 10 nm , subthreshold swing , system-on-a-chip (SOC) , thickness of siliconfilm , threshold voltage , adaptive computation , channel length , very large scale integration (VLSI).
