Title of article
Topology for hybrid multilevel inverter
Author/Authors
Lai، نويسنده , , Y.-S.; Shyu، نويسنده , , F.-S.، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2002
Pages
10
From page
449
To page
458
Abstract
A new topology for a hybrid multilevel inverter will be presented, which significantly
increases the level number of the output waveform and thereby dramatically reduces the low-order
harmonics and total harmonic distortion. To the best of the authorsʹ knowledge, the presented
topology has the greatest level number for a given number of stages. Moreover, the stage with
higher DC link voltage has lower switching frequency; and thereby reduces the switching losses.
Comparison of the results of various multilevel inverters will be investigated to reflect the merits of
the presented topology. The details of the PWM control using the harmonic elimination technique
for the hybrid inverter will be presented and confirmed by both simulation and experimental
results.
Journal title
IEE Proceedings Electric Power Applications
Serial Year
2002
Journal title
IEE Proceedings Electric Power Applications
Record number
402723
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